The ghes driver is not able yet to count legacy API counters in sysfs,
e.g.:
/sys/devices/system/edac/mc/mc0/csrow2/ce_count
/sys/devices/system/edac/mc/mc0/csrow2/ch0_ce_count
/sys/devices/system/edac/mc/mc0/csrow2/ch1_ce_count
Make counting csrows/channels generic so that the ghes driver can use
it too.
Signed-off-by: Robert Richter <rrich...@marvell.com>
---
drivers/edac/edac_mc.c | 39 ++++++++++++++++++++++-----------------
drivers/edac/edac_mc.h | 7 ++++++-
drivers/edac/ghes_edac.c | 2 +-
3 files changed, 29 insertions(+), 19 deletions(-)
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index 8613a31dc86c..f7e6a751f309 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -1007,7 +1007,8 @@ static void edac_ue_error(struct mem_ctl_info *mci,
void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type,
struct mem_ctl_info *mci,
struct dimm_info *dimm,
- struct edac_raw_error_desc *e)
+ struct edac_raw_error_desc *e,
+ int row, int chan)
{
char detail[80];
u8 grain_bits;
@@ -1040,7 +1041,23 @@ void edac_raw_mc_handle_error(const enum
hw_event_mc_err_type type,
e->label, detail, e->other_detail);
}
+ /* old API's counters */
+ if (dimm) {
+ row = dimm->csrow;
+ chan = dimm->cschannel;
+ }
+
+ if (row >= 0) {
+ if (type == HW_EVENT_ERR_CORRECTED) {
+ mci->csrows[row]->ce_count += e->error_count;
+ if (chan >= 0)
+ mci->csrows[row]->channels[chan]->ce_count +=
e->error_count;
+ } else {
+ mci->csrows[row]->ue_count += e->error_count;
+ }
+ }
+ edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
}
EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error);
@@ -1171,22 +1188,10 @@ void edac_mc_handle_error(const enum
hw_event_mc_err_type type,
}
}
- if (!per_layer_report) {
+ if (!per_layer_report)
strcpy(e->label, "any memory");
- } else {
- edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
- if (p == e->label)
- strcpy(e->label, "unknown memory");
- if (type == HW_EVENT_ERR_CORRECTED) {
- if (row >= 0) {
- mci->csrows[row]->ce_count += error_count;
- if (chan >= 0)
-
mci->csrows[row]->channels[chan]->ce_count += error_count;
- }
- } else
- if (row >= 0)
- mci->csrows[row]->ue_count += error_count;
- }
+ else if (!*e->label)
+ strcpy(e->label, "unknown memory");
/* Fill the RAM location data */
p = e->location;
@@ -1204,6 +1209,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type
type,
dimm = edac_get_dimm(mci, top_layer, mid_layer, low_layer);
- edac_raw_mc_handle_error(type, mci, dimm, e);
+ edac_raw_mc_handle_error(type, mci, dimm, e, row, chan);
}
EXPORT_SYMBOL_GPL(edac_mc_handle_error);
diff --git a/drivers/edac/edac_mc.h b/drivers/edac/edac_mc.h
index b816cf3caaee..c4ddd5c1e24c 100644
--- a/drivers/edac/edac_mc.h
+++ b/drivers/edac/edac_mc.h
@@ -216,6 +216,10 @@ extern int edac_mc_find_csrow_by_page(struct mem_ctl_info
*mci,
* @mci: a struct mem_ctl_info pointer
* @dimm: a struct dimm_info pointer
* @e: error description
+ * @row: csrow hint if there is no dimm info (<0 if
+ * unknown)
+ * @chan: cschannel hint if there is no dimm info (<0 if
+ * unknown)
*
* This raw function is used internally by edac_mc_handle_error(). It should
* only be called directly when the hardware error come directly from BIOS,
@@ -224,7 +228,8 @@ extern int edac_mc_find_csrow_by_page(struct mem_ctl_info
*mci,
void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type,
struct mem_ctl_info *mci,
struct dimm_info *dimm,
- struct edac_raw_error_desc *e);
+ struct edac_raw_error_desc *e,
+ int row, int chan);
/**
* edac_mc_handle_error() - Reports a memory event to userspace.
diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index f6ea4b070bfe..ea4d53043199 100644
--- a/drivers/edac/ghes_edac.c
+++ b/drivers/edac/ghes_edac.c
@@ -435,7 +435,7 @@ void ghes_edac_report_mem_error(int sev, struct
cper_sec_mem_err *mem_err)
dimm_info = edac_get_dimm_by_index(mci, e->top_layer);
- edac_raw_mc_handle_error(type, mci, dimm_info, e);
+ edac_raw_mc_handle_error(type, mci, dimm_info, e, -1, -1);
spin_unlock_irqrestore(&ghes_lock, flags);
}
--
2.20.1
