Signed-off-by: Hanna Hawa <[email protected]>
---
 .../devicetree/bindings/edac/amazon-al-edac.txt          | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/edac/amazon-al-edac.txt

diff --git a/Documentation/devicetree/bindings/edac/amazon-al-edac.txt 
b/Documentation/devicetree/bindings/edac/amazon-al-edac.txt
new file mode 100644
index 0000000..76165a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/amazon-al-edac.txt
@@ -0,0 +1,16 @@
+* Amazon Annapurna Labs EDAC
+
+Amazon Annapurna Labs Alpine V2 SoC is based on ARM Cortex-A57, and Alpine V3 
SoC is
+based on ARM Cortex-A72.
+Alpine SoCs support L1 and L2 error correction check based on ARM 
implementation.
+
+Required properties:
+- compatible:
+       should be "amazon,al-cortex-a57-edac" for Alpine V2.
+       should be "amazon,al-cortex-a72-edac" for Alpine V3.
+
+Example:
+
+       edac_l1_l2 {
+               compatible = "amazon,al-cortex-a57-edac";
+       };
-- 
2.7.4

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