Hi Greg (and all),
couldn't seen any follow up on this patch. I tested it and at least
for mcf5441x it works properly and solves all issues.
Do you think it may be accepted as an initial fix ?
Regards,
Angelo
On Mon, Apr 29, 2019 at 10:19:37AM +0200, Geert Uytterhoeven wrote:
> The generic definitions of mmio_{read,write}{16,32}be() in lib/iomap.c
> assume that the {read,write}[wl]() I/O accessors always use little
> endian accesses, and swap the result.
>
> However, the Coldfire versions of the {read,write}[wl]() I/O accessors are
> special, in that they use native big endian instead of little endian for
> accesses to the on-SoC peripheral block, thus violating the assumption.
>
> Fix this by providing our own variants, using the raw accessors,
> reinstating the old behavior. This is fine on m68k, as no special
> barriers are needed, and also avoids swapping data twice.
>
> Reported-by: Angelo Dureghello <[email protected]>
> Fixes: aecc787c06f4300f ("iomap: Use non-raw io functions for
> io{read|write}XXbe")
> Signed-off-by: Geert Uytterhoeven <[email protected]>
> ---
> This can be reverted later, after this oddity of the Coldfire I/O
> support has been fixed, and drivers have been updated.
> ---
> arch/m68k/include/asm/io.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h
> index aabe6420ead2a599..d47e7384681ab1cd 100644
> --- a/arch/m68k/include/asm/io.h
> +++ b/arch/m68k/include/asm/io.h
> @@ -8,6 +8,12 @@
> #include <asm/io_mm.h>
> #endif
>
> +#define mmio_read16be(addr) __raw_readw(addr)
> +#define mmio_read32be(addr) __raw_readl(addr)
> +
> +#define mmio_write16be(val, port) __raw_writew((val), (port))
> +#define mmio_write32be(val, port) __raw_writel((val), (port))
> +
> #include <asm-generic/io.h>
>
> #endif /* _M68K_IO_H */
> --
> 2.17.1
>
