Martin Blumenstingl <[email protected]> writes: > On Mon, May 27, 2019 at 2:51 PM Neil Armstrong <[email protected]> > wrote: >> >> The Amlogic G12A has the hwrng module at the end of an unknown >> "EFUSE" bus. >> >> The hwrng is not enabled on the vendor G12A DTs, but is enabled on >> next generation SM1 SoC family sharing the exact same memory mapping. >> >> Let's add the "EFUSE" bus and the hwrng node. >> >> This hwrng has been checked with the rng-tools rngtest FIPS tool : >> rngtest: starting FIPS tests... >> rngtest: bits received from input: 1630240032 >> rngtest: FIPS 140-2 successes: 81436 >> rngtest: FIPS 140-2 failures: 76 >> rngtest: FIPS 140-2(2001-10-10) Monobit: 10 >> rngtest: FIPS 140-2(2001-10-10) Poker: 6 >> rngtest: FIPS 140-2(2001-10-10) Runs: 26 >> rngtest: FIPS 140-2(2001-10-10) Long run: 34 >> rngtest: FIPS 140-2(2001-10-10) Continuous run: 0 >> rngtest: input channel speed: (min=3.784; avg=5687.521; >> max=19073.486)Mibits/s >> rngtest: FIPS tests speed: (min=47.684; avg=52.348; max=52.835)Mibits/s >> rngtest: Program run time: 30000987 microseconds >> >> Signed-off-by: Neil Armstrong <[email protected]> > Reviewed-by: Martin Blumenstingl <[email protected]>
Queued for v5.3, Thanks, Kevin
