[PATCH 1/1] ARM: dts: imx6ul: Add PXP node

[Sébastien Szymanski]

Add PXP node for i.MX6UL/L SoC.

Signed-off-by: Sébastien Szymanski <sebastien.szyman...@armadeus.com>
---
 arch/arm/boot/dts/imx6ul.dtsi  | 9 +++++++++
 arch/arm/boot/dts/imx6ull.dtsi | 6 ++++++
 2 files changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index f10012de5eb6..a3c005373ae1 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -971,6 +971,15 @@
                                status = "disabled";
                        };
 
+                       pxp: pxp@21cc000 {
+                               compatible = "fsl,imx6ul-pxp";
+                               reg = <0x021cc000 0x4000>;
+                               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_PXP>;
+                               clock-names = "axi";
+                               status = "disabled";
+                       };
+
                        qspi: spi@21e0000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 22e4a307fa59..b017e925bd87 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -34,6 +34,12 @@
        compatible = "fsl,imx6ull-ocotp", "syscon";
 };
 
+&pxp {
+       compatible = "fsl,imx6ull-pxp";
+       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+};
+
 &usdhc1 {
        compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
 };
-- 
2.19.2