From: Masayoshi Mizuma <[email protected]> If the cache line size is greater than ARCH_DMA_MINALIGN (128), the warning shows and it's tainted as TAINT_CPU_OUT_OF_SPEC.
However, it's not good about two points. First, as discussed in the thread [1], the cpu cache line size will be problem only on non-coherent devices. Then, it should not be tainted as TAINT_CPU_OUT_OF_SPEC because according to the specification of CTR_EL0.CWG, the maximum cache writeback granule is 2048 byte (CWG == 0b1001). This patch series try to: - Show the warning only if the device is non-coherent device and ARCH_DMA_MINALIGN is smaller than the cpu cache size. - Show the warning and taints as TAINT_CPU_OUT_OF_SPEC if the cache line size is greater than the maximum. [1] https://lore.kernel.org/linux-arm-kernel/20180514145703.celnlobzn3uh5tc2@localhost/ Masayoshi Mizuma (2): arm64/mm: check cpu cache line size with non-coherent device arm64/mm: show TAINT_CPU_OUT_OF_SPEC warning if the cache size is over the spec. arch/arm64/include/asm/cache.h | 2 ++ arch/arm64/mm/dma-mapping.c | 9 +++++---- arch/arm64/mm/init.c | 5 +++++ 3 files changed, 12 insertions(+), 4 deletions(-) -- 2.20.1
