[ Upstream commit 6a88e0c14813d00f8520d0e16cd4136c6cf8b4d4 ]

This patch trying to fix monitor freeze issue caused by drm error
'flip_done timed out' on LS1028A platform. this set try is make a loop
around the second setting CVAL and try like 5 times before giveing up.

Signed-off-by: Wen He <wen.h...@nxp.com>
Signed-off-by: Liviu Dudau <liviu.du...@arm.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/gpu/drm/arm/malidp_drv.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
index 94d6dabec2dc..1ab511e33243 100644
--- a/drivers/gpu/drm/arm/malidp_drv.c
+++ b/drivers/gpu/drm/arm/malidp_drv.c
@@ -190,6 +190,7 @@ static void malidp_atomic_commit_hw_done(struct 
drm_atomic_state *state)
 {
        struct drm_device *drm = state->dev;
        struct malidp_drm *malidp = drm->dev_private;
+       int loop = 5;
 
        malidp->event = malidp->crtc.state->event;
        malidp->crtc.state->event = NULL;
@@ -204,8 +205,18 @@ static void malidp_atomic_commit_hw_done(struct 
drm_atomic_state *state)
                        drm_crtc_vblank_get(&malidp->crtc);
 
                /* only set config_valid if the CRTC is enabled */
-               if (malidp_set_and_wait_config_valid(drm) < 0)
+               if (malidp_set_and_wait_config_valid(drm) < 0) {
+                       /*
+                        * make a loop around the second CVAL setting and
+                        * try 5 times before giving up.
+                        */
+                       while (loop--) {
+                               if (!malidp_set_and_wait_config_valid(drm))
+                                       break;
+                       }
                        DRM_DEBUG_DRIVER("timed out waiting for updated 
configuration\n");
+               }
+
        } else if (malidp->event) {
                /* CRTC inactive means vblank IRQ is disabled, send event 
directly */
                spin_lock_irq(&drm->event_lock);
-- 
2.20.1



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