Tegra210 platforms use sc7 entry firmware to program Tegra LP0/SC7 entry
sequence and sc7 entry firmware is run from COP/BPMP-Lite.

So, COP/BPMP-Lite still need IRQ function to finish SC7 suspend sequence
for Tegra210.

This patch has fix for leaving the COP IRQ enabled for Tegra210 during
interrupt controller suspend operation.

Acked-by: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatin...@nvidia.com>
---
 drivers/irqchip/irq-tegra.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c
index e1f771c72fc4..851f88cef508 100644
--- a/drivers/irqchip/irq-tegra.c
+++ b/drivers/irqchip/irq-tegra.c
@@ -44,6 +44,7 @@ static unsigned int num_ictlrs;
 
 struct tegra_ictlr_soc {
        unsigned int num_ictlrs;
+       bool supports_sc7;
 };
 
 static const struct tegra_ictlr_soc tegra20_ictlr_soc = {
@@ -56,6 +57,7 @@ static const struct tegra_ictlr_soc tegra30_ictlr_soc = {
 
 static const struct tegra_ictlr_soc tegra210_ictlr_soc = {
        .num_ictlrs = 6,
+       .supports_sc7 = true,
 };
 
 static const struct of_device_id ictlr_matches[] = {
@@ -67,6 +69,7 @@ static const struct of_device_id ictlr_matches[] = {
 
 struct tegra_ictlr_info {
        void __iomem *base[TEGRA_MAX_NUM_ICTLRS];
+       const struct tegra_ictlr_soc *soc;
 #ifdef CONFIG_PM_SLEEP
        u32 cop_ier[TEGRA_MAX_NUM_ICTLRS];
        u32 cop_iep[TEGRA_MAX_NUM_ICTLRS];
@@ -147,8 +150,20 @@ static int tegra_ictlr_suspend(void)
                lic->cop_ier[i] = readl_relaxed(ictlr + ICTLR_COP_IER);
                lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
 
-               /* Disable COP interrupts */
-               writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
+               /*
+                * AVP/COP/BPMP-Lite is the Tegra boot processor.
+                *
+                * Tegra210 system suspend flow uses sc7entry firmware which
+                * is executed by COP/BPMP and it includes disabling COP IRQ,
+                * clamping CPU rail, turning off VDD_CPU, and preparing the
+                * system to go to SC7/LP0.
+                *
+                * COP/BPMP wakes up when COP IRQ is triggered and runs
+                * sc7entry-firmware. So need to keep COP interrupt enabled.
+                */
+               if (!lic->soc->supports_sc7)
+                       /* Disable COP interrupts if SC7 is not supported */
+                       writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
 
                /* Disable CPU interrupts */
                writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
@@ -339,6 +354,7 @@ static int __init tegra_ictlr_init(struct device_node *node,
                goto out_unmap;
        }
 
+       lic->soc = soc;
        tegra_ictlr_syscore_init();
 
        pr_info("%pOF: %d interrupts forwarded to %pOF\n",
-- 
2.7.4

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