On 28/06/19 2:39 PM, Pratyush Yadav wrote:> According to the SMMUv3 spec [0] section 4.2.1, command 0x1 > (CMD_PREFETCH_CONFIG) does not take address and size as parameters. It > only takes StreamID, SSec, SubstreamID, and SSV. Address and Size are > parameters for command 0x2 (CMD_PREFETCH_ADDR). > > Tested on kernel 4.19 on TI J721E SOC. Even though I only tested on 4.19 because I don't have the setup to run mainline master on this SOC, the patch is based on mainline master and I did compile-test it. > [0] https://static.docs.arm.com/ihi0070/a/IHI_0070A_SMMUv3.pdf > > Signed-off-by: Pratyush Yadav <[email protected]> > --- > drivers/iommu/arm-smmu-v3.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index 4d5a694f02c2..2d4dfd909436 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -413,6 +413,7 @@ struct arm_smmu_cmdq_ent { > /* Command-specific fields */ > union { > #define CMDQ_OP_PREFETCH_CFG 0x1 > + #define CMDQ_OP_PREFETCH_ADDR 0x2 > struct { > u32 sid; > u8 size; > @@ -805,10 +806,12 @@ static int arm_smmu_cmdq_build_cmd(u64 *cmd, struct > arm_smmu_cmdq_ent *ent) > case CMDQ_OP_TLBI_EL2_ALL: > case CMDQ_OP_TLBI_NSNH_ALL: > break; > - case CMDQ_OP_PREFETCH_CFG: > - cmd[0] |= FIELD_PREP(CMDQ_PREFETCH_0_SID, ent->prefetch.sid); > + case CMDQ_OP_PREFETCH_ADDR: > cmd[1] |= FIELD_PREP(CMDQ_PREFETCH_1_SIZE, ent->prefetch.size); > cmd[1] |= ent->prefetch.addr & CMDQ_PREFETCH_1_ADDR_MASK; > + /* Fallthrough */ > + case CMDQ_OP_PREFETCH_CFG: > + cmd[0] |= FIELD_PREP(CMDQ_PREFETCH_0_SID, ent->prefetch.sid); > break; > case CMDQ_OP_CFGI_STE: > cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SID, ent->cfgi.sid); > -- Regards, Pratyush Yadav
