Commit-ID: 686cbe9e5d88ad639bbe26d963e7d5dafa1c1c28
Gitweb: https://git.kernel.org/tip/686cbe9e5d88ad639bbe26d963e7d5dafa1c1c28
Author: Arnaldo Carvalho de Melo <a...@redhat.com>
AuthorDate: Mon, 8 Jul 2019 13:47:14 -0300
Committer: Arnaldo Carvalho de Melo <a...@redhat.com>
CommitDate: Mon, 8 Jul 2019 13:47:14 -0300
tools arch x86: Sync asm/cpufeatures.h with the with the kernel
To pick up the changes in:
6dbbf5ec9e1e ("x86/cpufeatures: Enumerate user wait instructions")
b302e4b176d0 ("x86/cpufeatures: Enumerate the new AVX512 BFLOAT16
instructions")
acec0ce081de ("x86/cpufeatures: Combine word 11 and 12 into a new scattered
features word")
cbb99c0f5887 ("x86/cpufeatures: Add FDP_EXCPTN_ONLY and ZERO_FCS_FDS")
That don't affect anything in tools/.
This silences this perf build warning:
Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h'
differs from latest version at 'arch/x86/include/asm/cpufeatures.h'
diff -u tools/arch/x86/include/asm/cpufeatures.h
arch/x86/include/asm/cpufeatures.h
Cc: Aaron Lewis <aaronle...@google.com>
Cc: Adrian Hunter <adrian.hun...@intel.com>
Cc: Borislav Petkov <b...@suse.de>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jiri Olsa <jo...@kernel.org>
Cc: Namhyung Kim <namhy...@kernel.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Link: https://lkml.kernel.org/n/tip-y60wnyg2fuxi0hx7icruo...@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <a...@redhat.com>
---
tools/arch/x86/include/asm/cpufeatures.h | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/tools/arch/x86/include/asm/cpufeatures.h
b/tools/arch/x86/include/asm/cpufeatures.h
index 75f27ee2c263..998c2cc08363 100644
--- a/tools/arch/x86/include/asm/cpufeatures.h
+++ b/tools/arch/x86/include/asm/cpufeatures.h
@@ -239,12 +239,14 @@
#define X86_FEATURE_BMI1 ( 9*32+ 3) /* 1st group bit
manipulation extensions */
#define X86_FEATURE_HLE ( 9*32+ 4) /* Hardware Lock
Elision */
#define X86_FEATURE_AVX2 ( 9*32+ 5) /* AVX2 instructions */
+#define X86_FEATURE_FDP_EXCPTN_ONLY ( 9*32+ 6) /* "" FPU data pointer
updated only on x87 exceptions */
#define X86_FEATURE_SMEP ( 9*32+ 7) /* Supervisor Mode Execution
Protection */
#define X86_FEATURE_BMI2 ( 9*32+ 8) /* 2nd group bit
manipulation extensions */
#define X86_FEATURE_ERMS ( 9*32+ 9) /* Enhanced REP MOVSB/STOSB
instructions */
#define X86_FEATURE_INVPCID ( 9*32+10) /* Invalidate Processor
Context ID */
#define X86_FEATURE_RTM ( 9*32+11) /* Restricted
Transactional Memory */
#define X86_FEATURE_CQM ( 9*32+12) /* Cache QoS
Monitoring */
+#define X86_FEATURE_ZERO_FCS_FDS ( 9*32+13) /* "" Zero out FPU CS and
FPU DS */
#define X86_FEATURE_MPX ( 9*32+14) /* Memory Protection
Extension */
#define X86_FEATURE_RDT_A ( 9*32+15) /* Resource Director
Technology Allocation */
#define X86_FEATURE_AVX512F ( 9*32+16) /* AVX-512 Foundation */
@@ -269,13 +271,19 @@
#define X86_FEATURE_XGETBV1 (10*32+ 2) /* XGETBV with ECX = 1
instruction */
#define X86_FEATURE_XSAVES (10*32+ 3) /* XSAVES/XRSTORS
instructions */
-/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:0 (EDX), word 11 */
-#define X86_FEATURE_CQM_LLC (11*32+ 1) /* LLC QoS if 1 */
+/*
+ * Extended auxiliary flags: Linux defined - for features scattered in various
+ * CPUID levels like 0xf, etc.
+ *
+ * Reuse free bits when adding new feature flags!
+ */
+#define X86_FEATURE_CQM_LLC (11*32+ 0) /* LLC QoS if 1 */
+#define X86_FEATURE_CQM_OCCUP_LLC (11*32+ 1) /* LLC occupancy monitoring
*/
+#define X86_FEATURE_CQM_MBM_TOTAL (11*32+ 2) /* LLC Total MBM monitoring
*/
+#define X86_FEATURE_CQM_MBM_LOCAL (11*32+ 3) /* LLC Local MBM monitoring
*/
-/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (EDX), word 12 */
-#define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring
*/
-#define X86_FEATURE_CQM_MBM_TOTAL (12*32+ 1) /* LLC Total MBM monitoring
*/
-#define X86_FEATURE_CQM_MBM_LOCAL (12*32+ 2) /* LLC Local MBM monitoring
*/
+/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
+#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16
instructions */
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
@@ -322,6 +330,7 @@
#define X86_FEATURE_UMIP (16*32+ 2) /* User Mode Instruction
Protection */
#define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys
for Userspace */
#define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable
*/
+#define X86_FEATURE_WAITPKG (16*32+ 5) /* UMONITOR/UMWAIT/TPAUSE
Instructions */
#define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector
Bit Manipulation Instructions */
#define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New
Instructions */
#define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */
