On 08/05/2019 08:14 AM, Vignesh Raghavendra wrote: > External E-Mail > > > > On 31/07/19 2:42 PM, [email protected] wrote: >> From: Boris Brezillon <[email protected]> >> >> S3AN flashes use a specific opcode to read the status register. >> We currently use the SPI_S3AN flag to decide whether this specific >> SR read opcode should be used, but SPI_S3AN is about to disappear, so >> let's add a new flag. >> > > I think you can drop SPI_S3AN right away either as separate patch in > this series or as part of this patch itself. >
SPI_NOR_XSR_RDY is more generic than SPI_S3AN, and lets other flashes use SPINOR_OP_XRDSR SR read opcode if needed. If I drop SPI_S3AN now, I'll have to select the s3an_nor_setup() method based on SPI_NOR_XSR_RDY/SNOR_F_READY_XSR_RDY which might not be correct. There might be flashes that use SPINOR_OP_XRDSR but have a different setup call. Of course there are a lot of "might" here (because I couldn't find some other NORs that use this opcode), and if you have a strong opinion I can change as you suggested. I prefer to drop SPI_S3AN when moving the xillinx bits out of the core, as in https://patchwork.ozlabs.org/patch/1009295/. Cheers, ta
