Hi, Daniel
> Hi Anson,
>
> sorry for the late review, I've been pretty busy.
That is OK for sure.
>
> If Shawn is ok, I can pick the patches 1-4 in my tree and then this one after
> you fix the comments below.
Shawn should be OK for it, and he already took patch [PATCH V5 2/5] arm64:
Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms
since I ever sent it before in other series when system counter driver is NOT
landing on main line, now it landed, Shawn just apply
that old patch, so in V6 patch I just sent, I did NOT include this patch, you
can just apply the 4 patches in V6.
Hi, Shawn
Daniel will pick this whole patch series, please raise if you have any
concern, thanks.
>
> On 10/07/2019 08:30, [email protected] wrote:
>
> [ ... ]
>
> > + idle-states {
> > + entry-method = "psci";
> > +
> > + cpu_sleep_wait: cpu-sleep-wait {
>
> Is that a retention state or a powerdown? It is preferable to change the name
> to the idle state naming convention given in the PSCI documentation [1] page
> 16-17
Thanks for your detail reference, it is a power down state with SoC entering
WAIT mode,
so in V6, I change the name to "cpu_pd_wait:cpu-pd-wait".
>
>
> > + compatible = "arm,idle-state";
> > + arm,psci-suspend-param = <0x0010033>;
> > + local-timer-stop;
> > + entry-latency-us = <1000>;
> > + exit-latency-us = <700>;
> > + min-residency-us = <2700>;
> > + wakeup-latency-us = <1500>;
>
> It is pointless to specify the entry + exit *and* the wakeup-latency [2].
Ah, yes, this is new to me, I will just remove the “wakeup-latency-us” property.
Thanks,
Anson.
