On Mon, Aug 12, 2019 at 06:02:24PM +0800, Wen He wrote: > The LS1028A has a clock domain PXLCLK0 used for the Display output > interface in the display core, independent of the system bus frequency, > for flexible clock design. This display core has its own pixel clock. > > This patch enable the pixel clock provider on the LS1028A. > > Signed-off-by: Wen He <[email protected]>
Applied, thanks.
