On 8/8/2019 3:44 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-08-07 11:13:00)diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt index 8661c3cd3ccf..18d95467cb36 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt @@ -23,6 +23,7 @@ Required properties : "qcom,gcc-sdm630" "qcom,gcc-sdm660" "qcom,gcc-sdm845" + "qcom,gcc-sc7180" - reg : shall contain base register location and length - #clock-cells : shall contain 1Can you please list the clk inputs that you're expecting now? Similar to what Vinod did for the other most recent GCC driver. We should probably convert this binding to YAML.
Thanks Stephen for review, will send the YAML binding in the next patch series along with the clock inputs updated.
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