We use a pinctrl "workaround" to toggle the UFS reset line. Now that UFS
controller can issue the reset, just specify the line as a GPIO and let
it be reset that way.

Signed-off-by: Stephen Boyd <[email protected]>
---
 arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 51 +---------------------
 1 file changed, 2 insertions(+), 49 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi 
b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
index 1ebbd568dfd7..611ae48437f1 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
@@ -701,9 +701,8 @@ ap_ts_i2c: &i2c14 {
 
 &ufs_mem_hc {
        status = "okay";
-       pinctrl-names = "init", "default";
-       pinctrl-0 = <&ufs_dev_reset_assert>;
-       pinctrl-1 = <&ufs_dev_reset_deassert>;
+
+       reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
 
        vcc-supply = <&src_pp2950_l20a>;
        vcc-max-microamp = <600000>;
@@ -1258,52 +1257,6 @@ ap_ts_i2c: &i2c14 {
                };
        };
 
-       ufs_dev_reset_assert: ufs_dev_reset_assert {
-               config {
-                       pins = "ufs_reset";
-                       bias-pull-down;         /* default: pull down */
-                       /*
-                        * UFS_RESET driver strengths are having
-                        * different values/steps compared to typical
-                        * GPIO drive strengths.
-                        *
-                        * Following table clarifies:
-                        *
-                        * HDRV value | UFS_RESET | Typical GPIO
-                        *   (dec)    |   (mA)    |    (mA)
-                        *     0      |   0.8     |    2
-                        *     1      |   1.55    |    4
-                        *     2      |   2.35    |    6
-                        *     3      |   3.1     |    8
-                        *     4      |   3.9     |    10
-                        *     5      |   4.65    |    12
-                        *     6      |   5.4     |    14
-                        *     7      |   6.15    |    16
-                        *
-                        * POR value for UFS_RESET HDRV is 3 which means
-                        * 3.1mA and we want to use that. Hence just
-                        * specify 8mA to "drive-strength" binding and
-                        * that should result into writing 3 to HDRV
-                        * field.
-                        */
-                       drive-strength = <8>;   /* default: 3.1 mA */
-                       output-low; /* active low reset */
-               };
-       };
-
-       ufs_dev_reset_deassert: ufs_dev_reset_deassert {
-               config {
-                       pins = "ufs_reset";
-                       bias-pull-down;         /* default: pull down */
-                       /*
-                        * default: 3.1 mA
-                        * check comments under ufs_dev_reset_assert
-                        */
-                       drive-strength = <8>;
-                       output-high; /* active low reset */
-               };
-       };
-
        ap_suspend_l_assert: ap_suspend_l_assert {
                config {
                        pins = "gpio126";

base-commit: a55aa89aab90fae7c815b0551b07be37db359d76
prerequisite-patch-id: 2f2797d174d16a953446039125978c024c34d497
prerequisite-patch-id: 4020423c7331cee87d7679d325c66bafb56a6b69
prerequisite-patch-id: 46f8bd1aa2aee384021beefc9b6ed7315690f96f
-- 
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