Set the appropriate gpio interrupt controller compatible for the sm1 SoC family. This newer version of the controller can now trig irq on both edge of the input signal
Signed-off-by: Jerome Brunet <[email protected]> --- arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 521573f3a5ba..6152e928aef2 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -134,6 +134,11 @@ power-domains = <&pwrc PWRC_SM1_ETH_ID>; }; +&gpio_intc { + compatible = "amlogic,meson-sm1-gpio-intc", + "amlogic,meson-gpio-intc"; +}; + &pwrc { compatible = "amlogic,meson-sm1-pwrc"; }; -- 2.21.0
