On Sat, 7 Sep 2019, Chris Wilson wrote: > Quoting Linus Torvalds (2019-09-02 18:28:26) > > Bandan Das: > > x86/apic: Include the LDR when clearing out APIC registers > > Apologies if this is known already, I'm way behind on email. > > I've bisected > > [ 18.693846] smpboot: CPU 0 is now offline > [ 19.707737] smpboot: Booting Node 0 Processor 0 APIC 0x0 > [ 29.707602] smpboot: do_boot_cpu failed(-1) to wakeup CPU#0 > > https://intel-gfx-ci.01.org/tree/drm-tip/igt@perf_...@cpu-hotplug.html > > to 558682b52919. (Reverts cleanly and fixes the problem.) > > I'm guessing that this is also behind the suspend failures, missing > /dev/cpu/0/msr, and random perf_event_open() failures we have observed > in our CI since -rc7 across all generations of Intel cpus.
So is this on bare metal or in a VM? Thanks, tglx