Quoting [email protected] (2019-09-10 23:39:20) > From: Eugen Hristev <[email protected]> > > The PLL input range needs to be able to allow 24 Mhz crystal as input > Update the range accordingly in plla characteristics struct > > Signed-off-by: Eugen Hristev <[email protected]> > ---
Is there a Fixes: tag for this? Seems like it was always wrong?
