Quoting Peng Fan (2019-09-08 20:39:44)
> From: Peng Fan <peng....@nxp.com>
>
> pll BYPASS bit should be kept inside pll driver for glitchless freq
> setting following spec. If exposing the bit, that means pll driver and
> clk driver has two paths to touch this bit, which is wrong.
>
> So use EXT_BYPASS bit here.
>
> And drop uneeded set parent, because EXT_BYPASS default is 0.
>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Suggested-by: Jacky Bai <ping....@nxp.com>
> Reviewed-by: Leonard Crestez <leonard.cres...@nxp.com>
> Signed-off-by: Peng Fan <peng....@nxp.com>
> ---
Applied to clk-next
