From: Nikola Cornij <[email protected]> [ Upstream commit 75c35000235f3662f2810e9a59b0c8eed045432e ]
[why] DSC should be powered-on only on as-needed basis, i.e. if the mode requires it [how] Loop over all the DSCs at driver init time and power-gate each Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Sasha Levin <[email protected]> --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index d810c8940129b..2627e0a98a96a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -585,6 +585,10 @@ static void dcn20_init_hw(struct dc *dc) } } + /* Power gate DSCs */ + for (i = 0; i < res_pool->res_cap->num_dsc; i++) + dcn20_dsc_pg_control(hws, res_pool->dscs[i]->inst, false); + /* Blank pixel data with OPP DPG */ for (i = 0; i < dc->res_pool->timing_generator_count; i++) { struct timing_generator *tg = dc->res_pool->timing_generators[i]; -- 2.20.1
