The new Tegra CPU Idle driver now has a unified code path for the coupled CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30 SoC where the whole CPU cluster is power-gated.
Signed-off-by: Dmitry Osipenko <[email protected]> --- drivers/cpuidle/cpuidle-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 1a2cff5d4ff3..e38a2f6c11e1 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -298,7 +298,6 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) tegra_idle_driver.states[TEGRA_C7].disabled = true; break; case TEGRA30: - tegra_idle_driver.states[TEGRA_CC6].disabled = true; break; default: return -EINVAL; -- 2.23.0
