On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote: > On 13.10.19 г. 11:08 ч., Brian Masney wrote: > > Add interconnect nodes that's needed to support bus scaling. > > > > Signed-off-by: Brian Masney <[email protected]> > > --- > > arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++ > > 1 file changed, 60 insertions(+) > > > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi > > b/arch/arm/boot/dts/qcom-msm8974.dtsi > > @@ -1152,6 +1207,11 @@ > > "core", > > "vsync"; > > > > + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D > > &bimc BIMC_SLV_EBI_CH0>, > > + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D > > &ocmemnoc OCMEM_SLV_OCMEM>; > > Who will be the requesting bandwidth to DDR and ocmem? Is it the display or > GPU > or both? The above seem like GPU-related interconnects, so maybe these > properties should be in the GPU DT node.
The display is what currently requests the interconnect path, specifically mdp5_setup_interconnect() in drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings currently don't have interconnect support. Maybe this is something that I should add to that driver as well? > > + interconnect-names = "mdp0-mem", > > + "mdp1-mem"; > > As the second path is not to DDR, but to ocmem, it might be better to call it > something like "gpu-ocmem". I used what mdp5_kms.c expected. Brian
