Baikal-T1 SoC provides DW DMA controller to perform low-speed peripherals
Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
APB SSI devices embedded into the SoC. Currently this type DMA device is
supported by the DW APB SPI driver only as a middle layer code for Intel
MID PCI devices. Seeing the same code can be used for normal platform
DW DMAC device we introduced a set of patches to fix it within this
patchset.
First of all traditionally we replaced the legacy plain text-based dt-binding
file with yaml-based one. Then we unpinned the Intel MID specific code from
the generic DMA one and placed it into the spi-dw-pci.c driver, which was a
better place for it anyway. Then we introduced a set of naming cleanups since
the code was going to be used for generic DW DMAC device and DMAC usage
alterations to handle the controller functionality in a generic way by the
DW APB SSI MMIO driver as well. See the individual patches commit messages
for details.
In addition we fixed a problem in the native chip-select method, which despite
of multiple attempts to be fixed doesn't correctly perceive the SPI_CS_HIGH
flag and the enable-argument.
Finally as a cherry on a cake we replaced the manually written DebugFS
registers read method with a ready-to-use for the same purpose regset32
DebugFS interface usage.
This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4:
0e698dfa2822 ("Linux 5.7-rc4")
tag: v5.7-rc4
Co-developed-by: Georgy Vlasov <[email protected]>
Signed-off-by: Georgy Vlasov <[email protected]>
Co-developed-by: Ramil Zaripov <[email protected]>
Signed-off-by: Ramil Zaripov <[email protected]>
Signed-off-by: Serge Semin <[email protected]>
Cc: Alexey Malahov <[email protected]>
Cc: Maxim Kaurkin <[email protected]>
Cc: Pavel Parkhomenko <[email protected]>
Cc: Ekaterina Skachko <[email protected]>
Cc: Vadim Vlasov <[email protected]>
Cc: Alexey Kolotnikov <[email protected]>
Cc: Thomas Bogendoerfer <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Allison Randal <[email protected]>
Cc: Andy Shevchenko <[email protected]>
Cc: Gareth Williams <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Serge Semin (17):
dt-bindings: spi: Convert DW SPI binding to DT schema
dt-bindings: spi: dw: Add DMA properties bindings
spi: dw: Split up the generic DMA code and Intel MID driver
spi: dw: Cleanup generic DW DMA code namings
spi: dw: Discard static DW DMA slave structures
spi: dw: Add DW SPI DMA/PCI/MMIO dependency on DW SPI core
spi: dw: Add Tx/Rx finish wait methods to DMA
spi: dw: Clear DMAC register when done or stopped
spi: dw: Enable interrupts in accordance with DMA xfer mode
spi: dw: Parameterize the DMA Rx/Tx burst length
spi: dw: Fix native CS being unset
spi: dw: Fix dma_slave_config used partly uninitialized
spi: dw: Initialize paddr in DW SPI MMIO private data
spi: dw: Add DMA support to the DW SPI MMIO driver
spi: dw: Use DMA max burst to set the request thresholds
spi: dw: Fix Rx-only DMA transfers
spi: dw: Use regset32 DebugFS method to create a registers file
.../bindings/spi/snps,dw-apb-ssi.txt | 41 ---
.../bindings/spi/snps,dw-apb-ssi.yaml | 123 +++++++++
.../devicetree/bindings/spi/spi-dw.txt | 24 --
drivers/spi/Kconfig | 16 +-
drivers/spi/Makefile | 4 +-
drivers/spi/{spi-dw-mid.c => spi-dw-dma.c} | 237 ++++++++++++------
drivers/spi/spi-dw-mmio.c | 15 +-
drivers/spi/spi-dw-pci.c | 38 ++-
drivers/spi/spi-dw.c | 89 +++----
drivers/spi/spi-dw.h | 27 +-
10 files changed, 402 insertions(+), 212 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
create mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
delete mode 100644 Documentation/devicetree/bindings/spi/spi-dw.txt
rename drivers/spi/{spi-dw-mid.c => spi-dw-dma.c} (53%)
--
2.25.1
