On Sun, May 10, 2020 at 5:26 AM Joerg Roedel <[email protected]> wrote:
>
> The first race condition was around
> the non-atomic update of the domain page-table root pointer
> and the variable containing the page-table depth (called
> mode). This is fixed now be merging page-table root and mode
> into one 64-bit field which is read/written atomically.
This seems a bit odd.
The pointer part is always page-aligned, and the "mode" is just three bits.
Why isn't it just encoded as one pointer with the low three bits being the mode?
The thing is, the 64-bit atomic reads/writes are very expensive on
32-bit x86. If it was just a native pointer, it would be much cheaper
than an "atomic64_t".
Linus
