MCG_CAP never reports a negative count of available error-reporting
banks. Make it unsigned.
Check for MCA/MCE feature bits as early as possible.  While here, do an
indent cleanup.

Signed-off-by: Christoph Egger <[EMAIL PROTECTED]>
Signed-off-by: Joerg Roedel <[EMAIL PROTECTED]>
---
 arch/i386/kernel/cpu/mcheck/mce.c |   57 ++++++++++++++++++++++--------------
 arch/i386/kernel/cpu/mcheck/mce.h |    2 +-
 2 files changed, 36 insertions(+), 23 deletions(-)

diff --git a/arch/i386/kernel/cpu/mcheck/mce.c 
b/arch/i386/kernel/cpu/mcheck/mce.c
index 34c781e..2eb72ad 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.c
+++ b/arch/i386/kernel/cpu/mcheck/mce.c
@@ -17,7 +17,7 @@
 #include "mce.h"
 
 int mce_disabled = 0;
-int nr_mce_banks;
+unsigned int nr_mce_banks;
 
 EXPORT_SYMBOL_GPL(nr_mce_banks);       /* non-fatal.o */
 
@@ -33,30 +33,43 @@ void fastcall (*machine_check_vector)(struct pt_regs *, 
long error_code) = unexp
 /* This has to be run for each processor */
 void mcheck_init(struct cpuinfo_x86 *c)
 {
-       if (mce_disabled==1)
+       uint32_t mca, mce;
+
+       if (mce_disabled == 1) {
+               printk("MCE support disabled by bootparam\n");
+               return;
+       }
+
+       mca = cpu_has(c, X86_FEATURE_MCA);
+       mce = cpu_has(c, X86_FEATURE_MCE);
+
+       if (!mca || !mce) {
+               printk(KERN_INFO "CPU%i: No machine check support available\n",
+                       smp_processor_id());
                return;
+       }
 
        switch (c->x86_vendor) {
-               case X86_VENDOR_AMD:
-                       amd_mcheck_init(c);
-                       break;
-
-               case X86_VENDOR_INTEL:
-                       if (c->x86==5)
-                               intel_p5_mcheck_init(c);
-                       if (c->x86==6)
-                               intel_p6_mcheck_init(c);
-                       if (c->x86==15)
-                               intel_p4_mcheck_init(c);
-                       break;
-
-               case X86_VENDOR_CENTAUR:
-                       if (c->x86==5)
-                               winchip_mcheck_init(c);
-                       break;
-
-               default:
-                       break;
+       case X86_VENDOR_AMD:
+               amd_mcheck_init(c);
+               break;
+
+       case X86_VENDOR_INTEL:
+               if (c->x86==5)
+                       intel_p5_mcheck_init(c);
+               if (c->x86==6)
+               intel_p6_mcheck_init(c);
+               if (c->x86==15)
+                       intel_p4_mcheck_init(c);
+               break;
+
+       case X86_VENDOR_CENTAUR:
+               if (c->x86==5)
+                       winchip_mcheck_init(c);
+               break;
+
+       default:
+               break;
        }
 }
 
diff --git a/arch/i386/kernel/cpu/mcheck/mce.h 
b/arch/i386/kernel/cpu/mcheck/mce.h
index 81fb6e2..9cbe812 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.h
+++ b/arch/i386/kernel/cpu/mcheck/mce.h
@@ -10,5 +10,5 @@ void winchip_mcheck_init(struct cpuinfo_x86 *c);
 /* Call the installed machine check handler for this CPU setup. */
 extern fastcall void (*machine_check_vector)(struct pt_regs *, long 
error_code);
 
-extern int nr_mce_banks;
+extern unsigned int nr_mce_banks;
 
-- 
1.5.1.6



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