[RFC PATCH v4 08/13] riscv: Reset vector register

[Greentime Hu]

From: Guo Ren <guo...@linux.alibaba.com>

Reset vector registers at boot-time and disable vector instructions
execution for kernel mode.

Signed-off-by: Guo Ren <guo...@linux.alibaba.com>
---
 arch/riscv/kernel/entry.S |  2 +-
 arch/riscv/kernel/head.S  | 49 +++++++++++++++++++++++++++++++++++++--
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 56d071b2c0a1..4e32770c19c8 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -70,7 +70,7 @@ _save_context:
         * Disable the FPU to detect illegal usage of floating point in kernel
         * space.
         */
-       li t0, SR_SUM | SR_FS
+       li t0, SR_SUM | SR_FS | SR_VS
 
        REG_L s0, TASK_TI_USER_SP(tp)
        csrrc s1, CSR_STATUS, t0
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 98a406474e7d..1290ef680125 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -181,10 +181,10 @@ ENTRY(_start_kernel)
 .option pop
 
        /*
-        * Disable FPU to detect illegal usage of
+        * Disable FPU & VECTOR to detect illegal usage of
         * floating point in kernel space
         */
-       li t0, SR_FS
+       li t0, SR_FS | SR_VS
        csrc CSR_STATUS, t0
 
 #ifdef CONFIG_SMP
@@ -341,6 +341,51 @@ ENTRY(reset_regs)
        csrw    fcsr, 0
        /* note that the caller must clear SR_FS */
 #endif /* CONFIG_FPU */
+
+#ifdef CONFIG_VECTOR
+       csrr    t0, CSR_MISA
+       li      t1, (COMPAT_HWCAP_ISA_V >> 16)
+       slli    t1, t1, 16
+       and     t0, t0, t1
+       beqz    t0, .Lreset_regs_done
+
+       li      t1, SR_VS
+       csrs    CSR_STATUS, t1
+       vmv.v.i v0, 0
+       vmv.v.i v1, 0
+       vmv.v.i v2, 0
+       vmv.v.i v3, 0
+       vmv.v.i v4, 0
+       vmv.v.i v5, 0
+       vmv.v.i v6, 0
+       vmv.v.i v7, 0
+       vmv.v.i v8, 0
+       vmv.v.i v9, 0
+       vmv.v.i v10, 0
+       vmv.v.i v11, 0
+       vmv.v.i v12, 0
+       vmv.v.i v13, 0
+       vmv.v.i v14, 0
+       vmv.v.i v15, 0
+       vmv.v.i v16, 0
+       vmv.v.i v17, 0
+       vmv.v.i v18, 0
+       vmv.v.i v19, 0
+       vmv.v.i v20, 0
+       vmv.v.i v21, 0
+       vmv.v.i v22, 0
+       vmv.v.i v23, 0
+       vmv.v.i v24, 0
+       vmv.v.i v25, 0
+       vmv.v.i v26, 0
+       vmv.v.i v27, 0
+       vmv.v.i v28, 0
+       vmv.v.i v29, 0
+       vmv.v.i v30, 0
+       vmv.v.i v31, 0
+       /* note that the caller must clear SR_VS */
+#endif /* CONFIG_VECTOR */
+
 .Lreset_regs_done:
        ret
 END(reset_regs)
-- 
2.26.2