Since it has been redesigned with new version spec, please change the first-author :)
And add me as Co-developed. On Tue, May 26, 2020 at 3:03 PM Greentime Hu <[email protected]> wrote: > > From: Guo Ren <[email protected]> > > Follow the riscv vector spec to add new csr number. > > [[email protected]: update the defined value based on new spec and > remove unused ones] > Signed-off-by: Greentime Hu <[email protected]> > Signed-off-by: Guo Ren <[email protected]> > --- > arch/riscv/include/asm/csr.h | 16 ++++++++++++++-- > 1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h > index 8e18d2c64399..cc13626c4bbe 100644 > --- a/arch/riscv/include/asm/csr.h > +++ b/arch/riscv/include/asm/csr.h > @@ -24,6 +24,12 @@ > #define SR_FS_CLEAN _AC(0x00004000, UL) > #define SR_FS_DIRTY _AC(0x00006000, UL) > > +#define SR_VS _AC(0x00000600, UL) /* Vector Status */ > +#define SR_VS_OFF _AC(0x00000000, UL) > +#define SR_VS_INITIAL _AC(0x00000200, UL) > +#define SR_VS_CLEAN _AC(0x00000400, UL) > +#define SR_VS_DIRTY _AC(0x00000600, UL) > + > #define SR_XS _AC(0x00018000, UL) /* Extension Status */ > #define SR_XS_OFF _AC(0x00000000, UL) > #define SR_XS_INITIAL _AC(0x00008000, UL) > @@ -31,9 +37,9 @@ > #define SR_XS_DIRTY _AC(0x00018000, UL) > > #ifndef CONFIG_64BIT > -#define SR_SD _AC(0x80000000, UL) /* FS/XS dirty */ > +#define SR_SD _AC(0x80000000, UL) /* FS/VS/XS dirty */ > #else > -#define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */ > +#define SR_SD _AC(0x8000000000000000, UL) /* FS/VS/XS dirty */ > #endif > > /* SATP flags */ > @@ -114,6 +120,12 @@ > #define CSR_PMPADDR0 0x3b0 > #define CSR_MHARTID 0xf14 > > +#define CSR_VSTART 0x8 > +#define CSR_VCSR 0xf > +#define CSR_VL 0xc20 > +#define CSR_VTYPE 0xc21 > +#define CSR_VLENB 0xc22 > + > #ifdef CONFIG_RISCV_M_MODE > # define CSR_STATUS CSR_MSTATUS > # define CSR_IE CSR_MIE > -- > 2.26.2 > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
