This allows the CPU to receive interrupts.

Signed-off-by: Jonathan Marek <[email protected]>
---
 drivers/soundwire/qcom.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index ac81c64768ea..58ffb46e0d64 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -34,6 +34,7 @@
 #define SWRM_INTERRUPT_STATUS_SPECIAL_CMD_ID_FINISHED          BIT(10)
 #define SWRM_INTERRUPT_MASK_ADDR                               0x204
 #define SWRM_INTERRUPT_CLEAR                                   0x208
+#define SWRM_INTERRUPT_CPU_EN                                  0x210
 #define SWRM_CMD_FIFO_WR_CMD                                   0x300
 #define SWRM_CMD_FIFO_RD_CMD                                   0x304
 #define SWRM_CMD_FIFO_CMD                                      0x308
@@ -325,6 +326,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
        ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,
                        SWRM_COMP_CFG_IRQ_LEVEL_OR_PULSE_MSK |
                        SWRM_COMP_CFG_ENABLE_MSK);
+
+       /* enable CPU IRQs */
+       if (ctrl->mmio) {
+               ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,
+                               SWRM_INTERRUPT_STATUS_RMSK);
+       }
        return 0;
 }
 
-- 
2.26.1

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