Fixes the following W=1 kernel build warning(s):
drivers/scsi/qla4xxx/ql4_83xx.c: In function
‘qla4_83xx_dump_pause_control_regs’:
drivers/scsi/qla4xxx/ql4_83xx.c:1409:9: warning: variable ‘status’ set but not
used [-Wunused-but-set-variable]
1409 | int i, status = QLA_SUCCESS;
| ^~~~~~
Cc: qlogic-storage-upstr...@qlogic.com
Signed-off-by: Lee Jones <lee.jo...@linaro.org>
---
drivers/scsi/qla4xxx/ql4_83xx.c | 34 ++++++++++++---------------------
1 file changed, 12 insertions(+), 22 deletions(-)
diff --git a/drivers/scsi/qla4xxx/ql4_83xx.c b/drivers/scsi/qla4xxx/ql4_83xx.c
index 638f72c5ab052..de10e67de8c01 100644
--- a/drivers/scsi/qla4xxx/ql4_83xx.c
+++ b/drivers/scsi/qla4xxx/ql4_83xx.c
@@ -1406,16 +1406,16 @@ int qla4_83xx_isp_reset(struct scsi_qla_host *ha)
static void qla4_83xx_dump_pause_control_regs(struct scsi_qla_host *ha)
{
u32 val = 0, val1 = 0;
- int i, status = QLA_SUCCESS;
+ int i;
- status = qla4_83xx_rd_reg_indirect(ha, QLA83XX_SRE_SHIM_CONTROL, &val);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_SRE_SHIM_CONTROL, &val);
DEBUG2(ql4_printk(KERN_INFO, ha, "SRE-Shim Ctrl:0x%x\n", val));
/* Port 0 Rx Buffer Pause Threshold Registers. */
DEBUG2(ql4_printk(KERN_INFO, ha,
"Port 0 Rx Buffer Pause Threshold Registers[TC7..TC0]:"));
for (i = 0; i < 8; i++) {
- status = qla4_83xx_rd_reg_indirect(ha,
+ qla4_83xx_rd_reg_indirect(ha,
QLA83XX_PORT0_RXB_PAUSE_THRS + (i * 0x4), &val);
DEBUG2(pr_info("0x%x ", val));
}
@@ -1426,7 +1426,7 @@ static void qla4_83xx_dump_pause_control_regs(struct
scsi_qla_host *ha)
DEBUG2(ql4_printk(KERN_INFO, ha,
"Port 1 Rx Buffer Pause Threshold Registers[TC7..TC0]:"));
for (i = 0; i < 8; i++) {
- status = qla4_83xx_rd_reg_indirect(ha,
+ qla4_83xx_rd_reg_indirect(ha,
QLA83XX_PORT1_RXB_PAUSE_THRS + (i * 0x4), &val);
DEBUG2(pr_info("0x%x ", val));
}
@@ -1437,7 +1437,7 @@ static void qla4_83xx_dump_pause_control_regs(struct
scsi_qla_host *ha)
DEBUG2(ql4_printk(KERN_INFO, ha,
"Port 0 RxB Traffic Class Max Cell Registers[3..0]:"));
for (i = 0; i < 4; i++) {
- status = qla4_83xx_rd_reg_indirect(ha,
+ qla4_83xx_rd_reg_indirect(ha,
QLA83XX_PORT0_RXB_TC_MAX_CELL + (i * 0x4), &val);
DEBUG2(pr_info("0x%x ", val));
}
@@ -1448,7 +1448,7 @@ static void qla4_83xx_dump_pause_control_regs(struct
scsi_qla_host *ha)
DEBUG2(ql4_printk(KERN_INFO, ha,
"Port 1 RxB Traffic Class Max Cell Registers[3..0]:"));
for (i = 0; i < 4; i++) {
- status = qla4_83xx_rd_reg_indirect(ha,
+ qla4_83xx_rd_reg_indirect(ha,
QLA83XX_PORT1_RXB_TC_MAX_CELL + (i * 0x4), &val);
DEBUG2(pr_info("0x%x ", val));
}
@@ -1459,15 +1459,11 @@ static void qla4_83xx_dump_pause_control_regs(struct
scsi_qla_host *ha)
DEBUG2(ql4_printk(KERN_INFO, ha,
"Port 0 RxB Rx Traffic Class Stats [TC7..TC0]"));
for (i = 7; i >= 0; i--) {
- status = qla4_83xx_rd_reg_indirect(ha,
- QLA83XX_PORT0_RXB_TC_STATS,
- &val);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT0_RXB_TC_STATS, &val);
val &= ~(0x7 << 29); /* Reset bits 29 to 31 */
qla4_83xx_wr_reg_indirect(ha, QLA83XX_PORT0_RXB_TC_STATS,
(val | (i << 29)));
- status = qla4_83xx_rd_reg_indirect(ha,
- QLA83XX_PORT0_RXB_TC_STATS,
- &val);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT0_RXB_TC_STATS, &val);
DEBUG2(pr_info("0x%x ", val));
}
@@ -1477,24 +1473,18 @@ static void qla4_83xx_dump_pause_control_regs(struct
scsi_qla_host *ha)
DEBUG2(ql4_printk(KERN_INFO, ha,
"Port 1 RxB Rx Traffic Class Stats [TC7..TC0]"));
for (i = 7; i >= 0; i--) {
- status = qla4_83xx_rd_reg_indirect(ha,
- QLA83XX_PORT1_RXB_TC_STATS,
- &val);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT1_RXB_TC_STATS, &val);
val &= ~(0x7 << 29); /* Reset bits 29 to 31 */
qla4_83xx_wr_reg_indirect(ha, QLA83XX_PORT1_RXB_TC_STATS,
(val | (i << 29)));
- status = qla4_83xx_rd_reg_indirect(ha,
- QLA83XX_PORT1_RXB_TC_STATS,
- &val);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT1_RXB_TC_STATS, &val);
DEBUG2(pr_info("0x%x ", val));
}
DEBUG2(pr_info("\n"));
- status = qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT2_IFB_PAUSE_THRS,
- &val);
- status = qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT3_IFB_PAUSE_THRS,
- &val1);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT2_IFB_PAUSE_THRS, &val);
+ qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT3_IFB_PAUSE_THRS, &val1);
DEBUG2(ql4_printk(KERN_INFO, ha,
"IFB-Pause Thresholds: Port 2:0x%x, Port 3:0x%x\n",
--
2.25.1
