On 8/21/20 2:51 AM, Hongtao Wu wrote:
> From: Billows Wu <[email protected]>
>
> This series adds PCIe controller driver for Unisoc SoCs.
> This controller is based on DesignWare PCIe IP.
>
> Signed-off-by: Billows Wu <[email protected]>
> ---
> drivers/pci/controller/dwc/Kconfig | 12 ++
> drivers/pci/controller/dwc/Makefile | 1 +
> drivers/pci/controller/dwc/pcie-sprd.c | 256
> +++++++++++++++++++++++++++++++++
> 3 files changed, 269 insertions(+)
> create mode 100644 drivers/pci/controller/dwc/pcie-sprd.c
Hi,
> diff --git a/drivers/pci/controller/dwc/Kconfig
> b/drivers/pci/controller/dwc/Kconfig
> index 044a376..d26ce94 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -311,4 +311,16 @@ config PCIE_AL
> required only for DT-based platforms. ACPI platforms with the
> Annapurna Labs PCIe controller don't need to enable this.
>
> +config PCIE_SPRD
> + tristate "Unisoc PCIe controller - RC mode"
> + depends on ARCH_SPRD
> + depends on PCI_MSI_IRQ_DOMAIN
> + select PCIE_DW_HOST
> + help
> + Some Uisoc SoCs contain two PCIe controllers as RC: One is gen2,
Unisoc
> + and the other is gen3. While other Unisoc SoCs may have only one
> + PCIe controller which can be configured as an Endpoint(EP) or a Root
> + complex(RC). In order to enable host-specific features PCIE_SPRD
> must
complex (RC).
> + be selected, which uses the Designware core.
> +
> endmenu
Also, please follow Documentation/process/coding-style.rst for
Kconfig entries:
For all of the Kconfig* configuration files throughout the source tree,
the indentation is somewhat different. Lines under a ``config`` definition
are indented with one tab, while help text is indented an additional two
spaces.
--
~Randy
