On Thu, Aug 27, 2020 at 1:53 PM Yifei Jiang <[email protected]> wrote: > > The correct sip/sie 0x222 could mask wrong 0x000 by VSIP_VALID_MASK, > This patch fix it. > > Signed-off-by: Yifei Jiang <[email protected]> > Signed-off-by: Yipeng Yin <[email protected]> > --- > arch/riscv/kvm/vcpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index adb0815951aa..2976666e921f 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -419,8 +419,8 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu > *vcpu, > > if (reg_num == KVM_REG_RISCV_CSR_REG(sip) || > reg_num == KVM_REG_RISCV_CSR_REG(sie)) { > - reg_val = reg_val << VSIP_TO_HVIP_SHIFT; > reg_val = reg_val & VSIP_VALID_MASK; > + reg_val = reg_val << VSIP_TO_HVIP_SHIFT;
Thanks for this fix. I have squashed it into PATCH5 of KVM RISC-V v14 series. Regards, Anup
