They are thin wrappers around nor->controller_ops->{read,write}_reg().
In a future commit DTR support will be added. These ops can not be
supported by the {read,write}_reg() hooks and these helpers will make it
easier to reject those calls.Signed-off-by: Pratyush Yadav <[email protected]> --- drivers/mtd/spi-nor/core.c | 110 ++++++++++++++++--------------------- 1 file changed, 47 insertions(+), 63 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 65eff4ce6ab1..2ccf2c154779 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -82,6 +82,18 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, struct spi_mem_op *op) return spi_mem_exec_op(nor->spimem, op); } +static int spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, + size_t len) +{ + return nor->controller_ops->read_reg(nor, opcode, buf, len); +} + +static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf, + size_t len) +{ + return nor->controller_ops->write_reg(nor, opcode, buf, len); +} + /** * spi_nor_spimem_read_data() - read data from flash's memory region via * spi-mem @@ -228,10 +240,8 @@ int spi_nor_write_enable(struct spi_nor *nor) SPI_MEM_OP_NO_DATA); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN, - NULL, 0); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0); if (ret) dev_dbg(nor->dev, "error %d on Write Enable\n", ret); @@ -257,10 +267,8 @@ int spi_nor_write_disable(struct spi_nor *nor) SPI_MEM_OP_NO_DATA); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI, - NULL, 0); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0); if (ret) dev_dbg(nor->dev, "error %d on Write Disable\n", ret); @@ -288,10 +296,8 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) SPI_MEM_OP_DATA_IN(1, sr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR, - sr, 1); - } + } else + ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, sr, 1); if (ret) dev_dbg(nor->dev, "error %d reading SR\n", ret); @@ -319,10 +325,8 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) SPI_MEM_OP_DATA_IN(1, fsr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR, - fsr, 1); - } + } else + ret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, fsr, 1); if (ret) dev_dbg(nor->dev, "error %d reading FSR\n", ret); @@ -351,9 +355,8 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr) SPI_MEM_OP_DATA_IN(1, cr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1); - } + } else + ret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, cr, 1); if (ret) dev_dbg(nor->dev, "error %d reading CR\n", ret); @@ -384,12 +387,11 @@ int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable) SPI_MEM_OP_NO_DATA); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, - enable ? SPINOR_OP_EN4B : - SPINOR_OP_EX4B, - NULL, 0); - } + } else + ret = spi_nor_write_reg(nor, + enable ? SPINOR_OP_EN4B : + SPINOR_OP_EX4B, + NULL, 0); if (ret) dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret); @@ -420,10 +422,8 @@ static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable) SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR, - nor->bouncebuf, 1); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->bouncebuf, 1); if (ret) dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret); @@ -452,10 +452,8 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR, - nor->bouncebuf, 1); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1); if (ret) dev_dbg(nor->dev, "error %d writing EAR\n", ret); @@ -483,10 +481,8 @@ int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) SPI_MEM_OP_DATA_IN(1, sr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR, - sr, 1); - } + } else + ret = spi_nor_read_reg(nor, SPINOR_OP_XRDSR, sr, 1); if (ret) dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); @@ -528,10 +524,8 @@ static void spi_nor_clear_sr(struct spi_nor *nor) SPI_MEM_OP_NO_DATA); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR, - NULL, 0); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_CLSR, NULL, 0); if (ret) dev_dbg(nor->dev, "error %d clearing SR\n", ret); @@ -592,10 +586,8 @@ static void spi_nor_clear_fsr(struct spi_nor *nor) SPI_MEM_OP_NO_DATA); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR, - NULL, 0); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); if (ret) dev_dbg(nor->dev, "error %d clearing FSR\n", ret); @@ -736,10 +728,8 @@ static int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len) SPI_MEM_OP_DATA_OUT(len, sr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR, - sr, len); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr, len); if (ret) { dev_dbg(nor->dev, "error %d writing SR\n", ret); @@ -938,10 +928,8 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) SPI_MEM_OP_DATA_OUT(1, sr2, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2, - sr2, 1); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR2, sr2, 1); if (ret) { dev_dbg(nor->dev, "error %d writing SR2\n", ret); @@ -972,10 +960,8 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2) SPI_MEM_OP_DATA_IN(1, sr2, 1)); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2, - sr2, 1); - } + } else + ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR2, sr2, 1); if (ret) dev_dbg(nor->dev, "error %d reading SR2\n", ret); @@ -1003,10 +989,8 @@ static int spi_nor_erase_chip(struct spi_nor *nor) SPI_MEM_OP_NO_DATA); ret = spi_mem_exec_op(nor->spimem, &op); - } else { - ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE, - NULL, 0); - } + } else + ret = spi_nor_write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0); if (ret) dev_dbg(nor->dev, "error %d erasing chip\n", ret); @@ -1158,8 +1142,8 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr) addr >>= 8; } - return nor->controller_ops->write_reg(nor, nor->erase_opcode, - nor->bouncebuf, nor->addr_width); + return spi_nor_write_reg(nor, nor->erase_opcode, nor->bouncebuf, + nor->addr_width); } /** -- 2.25.0
