[PATCH v2 2/9] KVM: LAPIC: Guarantee the timer is in tsc-deadline mode when setting

[Wanpeng Li]

From: Wanpeng Li <wanpen...@tencent.com>

Check apic_lvtt_tscdeadline() mode directly instead of apic_lvtt_oneshot()
and apic_lvtt_period() to guarantee the timer is in tsc-deadline mode when
wrmsr MSR_IA32_TSCDEADLINE.

Reviewed-by: Sean Christopherson <sean.j.christopher...@intel.com>
Signed-off-by: Wanpeng Li <wanpen...@tencent.com>
---
 arch/x86/kvm/lapic.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 81bf6a8..33aab20 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2193,8 +2193,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, 
u64 data)
 {
        struct kvm_lapic *apic = vcpu->arch.apic;
 
-       if (!kvm_apic_present(vcpu) || apic_lvtt_oneshot(apic) ||
-                       apic_lvtt_period(apic))
+       if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic))
                return;
 
        hrtimer_cancel(&apic->lapic_timer.timer);
-- 
2.7.4