From: Tom Lendacky <[email protected]>

The GHCB defines a GHCB MSR protocol using the lower 12-bits of the GHCB
MSR (in the hypervisor this corresponds to the GHCB GPA field in the
VMCB).

Function 0x100 is a request for termination of the guest. The guest has
encountered some situation for which it has requested to be terminated.
The GHCB MSR value contains the reason for the request.

Signed-off-by: Tom Lendacky <[email protected]>
---
 arch/x86/kvm/svm/sev.c | 13 +++++++++++++
 arch/x86/kvm/svm/svm.h |  6 ++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 5cf823e1ce01..8300f3846580 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -1292,6 +1292,19 @@ static int sev_handle_vmgexit_msr_protocol(struct 
vcpu_svm *svm)
                                  GHCB_MSR_INFO_POS);
                break;
        }
+       case GHCB_MSR_TERM_REQ: {
+               u64 reason_set, reason_code;
+
+               reason_set = get_ghcb_msr_bits(svm,
+                                              GHCB_MSR_TERM_REASON_SET_MASK,
+                                              GHCB_MSR_TERM_REASON_SET_POS);
+               reason_code = get_ghcb_msr_bits(svm,
+                                               GHCB_MSR_TERM_REASON_MASK,
+                                               GHCB_MSR_TERM_REASON_POS);
+               pr_info("SEV-ES guest requested termination: %#llx:%#llx\n",
+                       reason_set, reason_code);
+               fallthrough;
+       }
        default:
                ret = -EINVAL;
        }
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 0a84fae34629..3574f52f8a1c 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -535,6 +535,12 @@ void svm_vcpu_unblocking(struct kvm_vcpu *vcpu);
 #define GHCB_MSR_CPUID_REG_POS         30
 #define GHCB_MSR_CPUID_REG_MASK                0x3
 
+#define GHCB_MSR_TERM_REQ              0x100
+#define GHCB_MSR_TERM_REASON_SET_POS   12
+#define GHCB_MSR_TERM_REASON_SET_MASK  0xf
+#define GHCB_MSR_TERM_REASON_POS       16
+#define GHCB_MSR_TERM_REASON_MASK      0xff
+
 extern unsigned int max_sev_asid;
 
 static inline bool svm_sev_enabled(void)
-- 
2.28.0

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