Hi, On Tue, Sep 15, 2020 at 7:10 AM elaine.zhang <zhangq...@rock-chips.com> wrote: > > hi, > > We have two submissions which I hope will be helpful to you. > > https://patchwork.kernel.org/patch/11272465/ > https://patchwork.kernel.org/patch/11272471/
I can see this, I have reconstructed the fractional divider handling for px30 instead of all rockchiip platforms, is it okay to send px30-alone fractional div handling support? > > > A few more notes: > 1. DCLK does not recommend the use of fractional frequency divider. > Generally, DCLK will monopolize a PLL, and the relationship between DCLK > frequency and PLL frequency is 1:1. > 2, half-div, not all SOC support, detailed need to see TRM. Can you point me the Page number on TRM? Jagan.