On Thu, Sep 24, 2020 at 11:42 AM Tom Lendacky <thomas.lenda...@amd.com> wrote: > > From: Tom Lendacky <thomas.lenda...@amd.com> > > This series updates the INVD intercept support for both SVM and VMX to > skip the instruction rather than emulating it, since emulation of this > instruction is just a NOP.
Isn't INVD a serializing instruction, whereas NOP isn't? IIRC, Intel doesn't architect VM-entry or VM-exit as serializing, though they probably are in practice. I'm not sure what AMD's stance on this is.
