Hi Ezequiel,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on linus/master v5.9-rc7 next-20200930]
[cannot apply to sunxi/sunxi/for-next linux/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    
https://github.com/0day-ci/linux/commits/Ezequiel-Garcia/MPEG-2-stateless-API-cleanup/20200930-075132
base:   git://linuxtv.org/media_tree.git master
config: arm64-randconfig-r005-20200930 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
bcd05599d0e53977a963799d6ee4f6e0bc21331b)
reproduce (this is a W=1 build):
        wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # 
https://github.com/0day-ci/linux/commit/66b41927094ce2dca6a1b64570eb067fa5a24f74
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review 
Ezequiel-Garcia/MPEG-2-stateless-API-cleanup/20200930-075132
        git checkout 66b41927094ce2dca6a1b64570eb067fa5a24f74
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>

All warnings (new ones prefixed by >>):

>> drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c:208:33: warning: 
>> logical not is only applied to the left hand side of this bitwise operator 
>> [-Wlogical-not-parentheses]
                 VDPU_REG_PIC_INTERLACE_E(!seq->flags & 
V4L2_MPEG2_SEQ_FLAG_PROGRESSIVE) |
                                          ^           ~
   drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c:52:39: note: expanded 
from macro 'VDPU_REG_PIC_INTERLACE_E'
   #define VDPU_REG_PIC_INTERLACE_E(v)     ((v) ? BIT(17) : 0)
                                             ^
   drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c:208:33: note: add 
parentheses after the '!' to evaluate the bitwise operator first
   drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c:208:33: note: add 
parentheses around left hand side expression to silence this warning
   1 warning generated.

vim +208 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c

   155  
   156  void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx)
   157  {
   158          struct hantro_dev *vpu = ctx->dev;
   159          struct vb2_v4l2_buffer *src_buf, *dst_buf;
   160          const struct v4l2_ctrl_mpeg2_slice_params *slice_params;
   161          const struct v4l2_mpeg2_sequence *seq;
   162          const struct v4l2_mpeg2_picture *pic;
   163          u32 reg;
   164  
   165          src_buf = hantro_get_src_buf(ctx);
   166          dst_buf = hantro_get_dst_buf(ctx);
   167  
   168          hantro_start_prepare_run(ctx);
   169  
   170          slice_params = hantro_get_ctrl(ctx,
   171                                         
V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS);
   172          seq = &slice_params->sequence;
   173          pic = &slice_params->picture;
   174  
   175          reg = VDPU_REG_DEC_ADV_PRE_DIS(0) |
   176                VDPU_REG_DEC_SCMD_DIS(0) |
   177                VDPU_REG_FILTERING_DIS(1) |
   178                VDPU_REG_DEC_LATENCY(0);
   179          vdpu_write_relaxed(vpu, reg, VDPU_SWREG(50));
   180  
   181          reg = VDPU_REG_INIT_QP(1) |
   182                VDPU_REG_STREAM_LEN(slice_params->bit_size >> 3);
   183          vdpu_write_relaxed(vpu, reg, VDPU_SWREG(51));
   184  
   185          reg = VDPU_REG_APF_THRESHOLD(8) |
   186                VDPU_REG_STARTMB_X(0) |
   187                VDPU_REG_STARTMB_Y(0);
   188          vdpu_write_relaxed(vpu, reg, VDPU_SWREG(52));
   189  
   190          reg = VDPU_REG_DEC_MODE(5);
   191          vdpu_write_relaxed(vpu, reg, VDPU_SWREG(53));
   192  
   193          reg = VDPU_REG_DEC_STRENDIAN_E(1) |
   194                VDPU_REG_DEC_STRSWAP32_E(1) |
   195                VDPU_REG_DEC_OUTSWAP32_E(1) |
   196                VDPU_REG_DEC_INSWAP32_E(1) |
   197                VDPU_REG_DEC_OUT_ENDIAN(1) |
   198                VDPU_REG_DEC_IN_ENDIAN(1);
   199          vdpu_write_relaxed(vpu, reg, VDPU_SWREG(54));
   200  
   201          reg = VDPU_REG_DEC_DATA_DISC_E(0) |
   202                VDPU_REG_DEC_MAX_BURST(16) |
   203                VDPU_REG_DEC_AXI_WR_ID(0) |
   204                VDPU_REG_DEC_AXI_RD_ID(0);
   205          vdpu_write_relaxed(vpu, reg, VDPU_SWREG(56));
   206  
   207          reg = VDPU_REG_RLC_MODE_E(0) |
 > 208                VDPU_REG_PIC_INTERLACE_E(!seq->flags & 
 > V4L2_MPEG2_SEQ_FLAG_PROGRESSIVE) |

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]

Attachment: .config.gz
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