Hi, On Fri, Oct 16, 2020 at 7:01 PM Stephen Boyd <[email protected]> wrote: > > If the GDSC is enabled out of boot but doesn't have the retain ff bit > set we will get confusing results where the registers that are powered > by the GDSC lose their contents on the first power off of the GDSC but > thereafter they retain their contents. This is because gdsc_init() fails > to make sure the RETAIN_FF bit is set when it probes the GDSC the first > time and thus powering off the GDSC causes the register contents to be > reset. We do set the RETAIN_FF bit the next time we power on the GDSC, > see gdsc_enable(), so that subsequent GDSC power off's don't lose > register contents state. > > Forcibly set the bit at device probe time so that the kernel's assumed > view of the GDSC is consistent with the state of the hardware. This > fixes a problem where the audio PLL doesn't work on sc7180 when the > bootloader leaves the lpass_core_hm GDSC enabled at boot (e.g. to make a > noise) but critically doesn't set the RETAIN_FF bit. > > Cc: Douglas Anderson <[email protected]> > Cc: Taniya Das <[email protected]> > Cc: Rajendra Nayak <[email protected]> > Fixes: 173722995cdb ("clk: qcom: gdsc: Add support to enable retention of > GSDCR") > Signed-off-by: Stephen Boyd <[email protected]> > --- > drivers/clk/qcom/gdsc.c | 8 ++++++++ > 1 file changed, 8 insertions(+)
Reviewed-by: Douglas Anderson <[email protected]> Tested-by: Douglas Anderson <[email protected]>
