Some identifiers have different names between their prototypes and the kernel-doc markup.
Signed-off-by: Mauro Carvalho Chehab <[email protected]> --- kernel/irq/chip.c | 2 +- kernel/irq/generic-chip.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index b9b9618e1aca..df75c3573dcb 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -44,41 +44,41 @@ int irq_set_chip(unsigned int irq, struct irq_chip *chip) struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); if (!desc) return -EINVAL; if (!chip) chip = &no_irq_chip; desc->irq_data.chip = chip; irq_put_desc_unlock(desc, flags); /* * For !CONFIG_SPARSE_IRQ make the irq show up in * allocated_irqs. */ irq_mark_irq(irq); return 0; } EXPORT_SYMBOL(irq_set_chip); /** - * irq_set_type - set the irq trigger type for an irq + * irq_set_irq_type - set the irq trigger type for an irq * @irq: irq number * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h */ int irq_set_irq_type(unsigned int irq, unsigned int type) { unsigned long flags; struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); int ret = 0; if (!desc) return -EINVAL; ret = __irq_set_trigger(desc, type); irq_put_desc_busunlock(desc, flags); return ret; } EXPORT_SYMBOL(irq_set_irq_type); /** * irq_set_handler_data - set irq handler data for an irq diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index e2999a070a99..a23ac2bbf433 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -252,41 +252,41 @@ EXPORT_SYMBOL_GPL(irq_alloc_generic_chip); static void irq_gc_init_mask_cache(struct irq_chip_generic *gc, enum irq_gc_flags flags) { struct irq_chip_type *ct = gc->chip_types; u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask; int i; for (i = 0; i < gc->num_ct; i++) { if (flags & IRQ_GC_MASK_CACHE_PER_TYPE) { mskptr = &ct[i].mask_cache_priv; mskreg = ct[i].regs.mask; } ct[i].mask_cache = mskptr; if (flags & IRQ_GC_INIT_MASK_CACHE) *mskptr = irq_reg_readl(gc, mskreg); } } /** - * __irq_alloc_domain_generic_chip - Allocate generic chips for an irq domain + * __irq_alloc_domain_generic_chips - Allocate generic chips for an irq domain * @d: irq domain for which to allocate chips * @irqs_per_chip: Number of interrupts each chip handles (max 32) * @num_ct: Number of irq_chip_type instances associated with this * @name: Name of the irq chip * @handler: Default flow handler associated with these chips * @clr: IRQ_* bits to clear in the mapping function * @set: IRQ_* bits to set in the mapping function * @gcflags: Generic chip specific setup flags */ int __irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip, int num_ct, const char *name, irq_flow_handler_t handler, unsigned int clr, unsigned int set, enum irq_gc_flags gcflags) { struct irq_domain_chip_generic *dgc; struct irq_chip_generic *gc; int numchips, sz, i; unsigned long flags; void *tmp; -- 2.28.0
