On Tue 27 Oct 12:00 CDT 2020, Manivannan Sadhasivam wrote: > Document the PCIe DT bindings for SM8250 SoC. The PCIe IP is similar to > the one used on SDM845, hence just add the compatible along with the > optional "atu" register region. > > Signed-off-by: Manivannan Sadhasivam <[email protected]> > Acked-by: Rob Herring <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]> > --- > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > index 02bc81bb8b2d..3b55310390a0 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > @@ -13,6 +13,7 @@ > - "qcom,pcie-ipq8074" for ipq8074 > - "qcom,pcie-qcs404" for qcs404 > - "qcom,pcie-sdm845" for sdm845 > + - "qcom,pcie-sm8250" for sm8250 > > - reg: > Usage: required > @@ -27,6 +28,7 @@ > - "dbi" DesignWare PCIe registers > - "elbi" External local bus interface registers > - "config" PCIe configuration space > + - "atu" ATU address space (optional) > > - device_type: > Usage: required > @@ -131,7 +133,7 @@ > - "slave_bus" AXI Slave clock > > -clock-names: > - Usage: required for sdm845 > + Usage: required for sdm845 and sm8250 > Value type: <stringlist> > Definition: Should contain the following entries > - "aux" Auxiliary clock > @@ -206,7 +208,7 @@ > - "ahb" AHB reset > > - reset-names: > - Usage: required for sdm845 > + Usage: required for sdm845 and sm8250 > Value type: <stringlist> > Definition: Should contain the following entries > - "pci" PCIe core reset > -- > 2.17.1 >
