On 6/11/20 4:27 am, AKASHI Takahiro wrote:
> This is a sdhci version of mmc's uhs2_set_reg operation.
> UHS-II interface (related registers) will be initialised here.
> 
> Signed-off-by: Ben Chuang <[email protected]>
> Signed-off-by: AKASHI Takahiro <[email protected]>
> ---
>  drivers/mmc/host/sdhci-uhs2.c | 103 ++++++++++++++++++++++++++++++++++
>  1 file changed, 103 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c
> index 55362ace1857..d8afb99a9918 100644
> --- a/drivers/mmc/host/sdhci-uhs2.c
> +++ b/drivers/mmc/host/sdhci-uhs2.c
> @@ -332,6 +332,68 @@ static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, 
> struct mmc_ios *ios)
>       spin_unlock_irqrestore(&host->lock, flags);
>  }
>  
> +/* TODO: move this function to sdhci.c */
> +static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
> +{
> +     u32 ier;
> +
> +     ier = sdhci_readl(host, SDHCI_INT_ENABLE);
> +     ier &= ~clear;
> +     ier |= set;
> +     sdhci_writel(host, ier, SDHCI_INT_ENABLE);
> +     sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
> +}
> +
> +static void sdhci_uhs2_set_config(struct sdhci_host *host)
> +{
> +     u32 value;
> +     u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SET_PTR);
> +     u16 sdhci_uhs2_gen_set_reg = (sdhci_uhs2_set_ptr + 0);
> +     u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> +     u16 sdhci_uhs2_tran_set_reg = (sdhci_uhs2_set_ptr + 8);
> +     u16 sdhci_uhs2_tran_set_1_reg = (sdhci_uhs2_set_ptr + 12);
> +
> +     /* Set Gen Settings */
> +     sdhci_writel(host, host->mmc->uhs2_caps.n_lanes_set <<
> +             SDHCI_UHS2_GEN_SET_N_LANES_POS, sdhci_uhs2_gen_set_reg);
> +
> +     /* Set PHY Settings */
> +     value = (host->mmc->uhs2_caps.n_lss_dir_set <<
> +                     SDHCI_UHS2_PHY_SET_N_LSS_DIR_POS) |
> +             (host->mmc->uhs2_caps.n_lss_sync_set <<
> +                     SDHCI_UHS2_PHY_SET_N_LSS_SYN_POS);
> +     if (host->mmc->flags & MMC_UHS2_SPEED_B)
> +             value |= 1 << SDHCI_UHS2_PHY_SET_SPEED_POS;
> +     sdhci_writel(host, value, sdhci_uhs2_phy_set_reg);
> +
> +     /* Set LINK-TRAN Settings */
> +     value = (host->mmc->uhs2_caps.max_retry_set <<
> +                     SDHCI_UHS2_TRAN_SET_RETRY_CNT_POS) |
> +             (host->mmc->uhs2_caps.n_fcu_set <<
> +                     SDHCI_UHS2_TRAN_SET_N_FCU_POS);
> +     sdhci_writel(host, value, sdhci_uhs2_tran_set_reg);
> +     sdhci_writel(host, host->mmc->uhs2_caps.n_data_gap_set,
> +                  sdhci_uhs2_tran_set_1_reg);
> +}
> +
> +static int sdhci_uhs2_check_dormant(struct sdhci_host *host)
> +{
> +     int timeout = 100;
> +
> +     while (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
> +             SDHCI_UHS2_IN_DORMANT_STATE)) {

Can use read_poll_timeout(sdhci_readl,..., host, SDHCI_PRESENT_STATE)

> +             if (timeout == 0) {
> +                     pr_warn("%s: UHS2 IN_DORMANT fail in 100ms.\n",
> +                             mmc_hostname(host->mmc));
> +                     sdhci_dumpregs(host);
> +                     return -EIO;
> +             }
> +             timeout--;
> +             mdelay(1);
> +     }
> +     return 0;
> +}
> +
>  
> /*****************************************************************************\
>   *                                                                           
> *
>   * MMC callbacks                                                             
> *
> @@ -422,6 +484,45 @@ static void sdhci_uhs2_enable_clk(struct mmc_host *mmc)
>       }
>  }
>  
> +static int sdhci_uhs2_set_reg(struct mmc_host *mmc, enum uhs2_act act)
> +{
> +        struct sdhci_host *host = mmc_priv(mmc);
> +     unsigned long flags;
> +     int err = 0;
> +     u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SET_PTR);
> +     u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> +
> +     DBG("Begin sdhci_uhs2_set_reg, act %d.\n", act);
> +     spin_lock_irqsave(&host->lock, flags);
> +
> +     switch (act) {
> +     case SET_CONFIG:
> +             sdhci_uhs2_set_config(host);
> +             break;
> +     case ENABLE_INT:
> +             sdhci_clear_set_irqs(host, 0, SDHCI_INT_CARD_INT);
> +             break;
> +     case DISABLE_INT:
> +             sdhci_clear_set_irqs(host, SDHCI_INT_CARD_INT, 0);
> +             break;
> +     case SET_SPEED_B:
> +             sdhci_writeb(host, 1 << SDHCI_UHS2_PHY_SET_SPEED_POS,
> +                          sdhci_uhs2_phy_set_reg);
> +             break;
> +     case CHECK_DORMANT:
> +             err = sdhci_uhs2_check_dormant(host);
> +             break;
> +     default:
> +             pr_err("%s: input action %d is wrong!\n",
> +                    mmc_hostname(host->mmc), act);
> +             err = -EIO;
> +             break;
> +     }
> +
> +     spin_unlock_irqrestore(&host->lock, flags);
> +     return err;
> +}
> +
>  
> /*****************************************************************************\
>   *                                                                           
> *
>   * Driver init/exit                                                          
> *
> @@ -597,6 +698,8 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host 
> *host)
>               host->mmc_host_ops.uhs2_disable_clk = sdhci_uhs2_disable_clk;
>       if (!host->mmc_host_ops.uhs2_enable_clk)
>               host->mmc_host_ops.uhs2_enable_clk = sdhci_uhs2_enable_clk;
> +     if (!host->mmc_host_ops.uhs2_set_reg)
> +             host->mmc_host_ops.uhs2_set_reg = sdhci_uhs2_set_reg;
>  
>       return 0;
>  }
> 

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