From: Biwen Li <biwen...@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen...@nxp.com>
---
Change in v3:
- none
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 27 ++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 5c2e370f6316..38a6d951ecc5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
*
* Mingkai Hu <mingkai...@freescale.com>
*/
@@ -311,6 +311,31 @@
compatible = "fsl,ls1043a-scfg", "syscon";
reg = <0x0 0x1570000 0x0 0x10000>;
big-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1570000 0x10000>;
+
+ extirq: interrupt-controller@1ac {
+ compatible = "fsl,ls1043a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1ac 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 131
IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 132
IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 133
IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 135
IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 136
IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 137
IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 145
IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 146
IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 147
IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 149
IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 150
IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 151
IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
};
crypto: crypto@1700000 {
--
2.17.1
