On Wed, 25 Nov 2020 11:32:02 +0100, Gregory CLEMENT wrote: > Add the Device Tree binding documentation for the Microsemi Jaguar2, > Luton and Serval interrupt controller that is part of the ICPU. It is > connected directly to the MIPS core interrupt controller. > > Signed-off-by: Gregory CLEMENT <[email protected]> > --- > .../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml | 4 ++++ > 1 file changed, 4 insertions(+) >
Reviewed-by: Rob Herring <[email protected]>
