This patch enables QSPI on Jetson Nano.

Signed-off-by: Sowjanya Komatineni <skomatin...@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 12 ++++++++++++
 arch/arm64/boot/dts/nvidia/tegra210.dtsi           |  5 +++--
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts 
b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index 6a877de..a1b4603 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -638,6 +638,18 @@
                };
        };
 
+       spi@70410000 {
+               status = "okay";
+
+               flash@0 {
+                       compatible = "spi-nor";
+                       reg = <0>;
+                       spi-max-frequency = <104000000>;
+                       spi-tx-bus-width = <2>;
+                       spi-rx-bus-width = <2>;
+               };
+       };
+
        clk32k_in: clock@0 {
                compatible = "fixed-clock";
                clock-frequency = <32768>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi 
b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 4fbf8c1..998fa81 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1536,8 +1536,9 @@
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
-               clocks = <&tegra_car TEGRA210_CLK_QSPI>;
-               clock-names = "qspi";
+               clocks = <&tegra_car TEGRA210_CLK_QSPI>,
+                        <&tegra_car TEGRA210_CLK_QSPI_PM>;
+               clock-names = "qspi", "qspi_out";
                resets = <&tegra_car 211>;
                reset-names = "qspi";
                dmas = <&apbdma 5>, <&apbdma 5>;
-- 
2.7.4

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