From: Stefan Agner <ste...@agner.ch>
[ Upstream commit 3d07c3b3a886fefd583c1b485b5e4e3c4e2da493 ]
According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.
Fixes: ed5e8f689154 ("arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY
reset line")
Reviewed-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
Signed-off-by: Stefan Agner <ste...@agner.ch>
Signed-off-by: Kevin Hilman <khil...@baylibre.com>
Link:
https://lore.kernel.org/r/12506964ca5d5f936579a280ad0a7e7f9a0a2d4c.1607363522.git.ste...@agner.ch
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 17155fb73fce9..c48125bf9d1e3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -340,7 +340,7 @@
eee-broken-1000t;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW |
GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
--
2.27.0
