Current struct intel_svm has a field to record the struct intel_iommu
pointer for a PASID bind. And struct intel_svm will be shared by all
the devices bind to the same process. The devices may be behind different
DMAR units. As the iommu driver code uses the intel_iommu pointer stored
in intel_svm struct to do cache invalidations, it may only flush the cache
on a single DMAR unit, for others, the cache invalidation is missed.

As intel_svm struct already has a device list, this patch just moves the
intel_iommu pointer to be a field of intel_svm_dev struct.

Fixes: 1c4f88b7f1f92 ("iommu/vt-d: Shared virtual address in scalable mode")
Cc: Lu Baolu <baolu...@linux.intel.com>
Cc: Jacob Pan <jacob.jun....@linux.intel.com>
Cc: Raj Ashok <ashok....@intel.com>
Cc: David Woodhouse <dw...@infradead.org>
Reported-by: Guo Kaijie <kaijie....@intel.com>
Reported-by: Xin Zeng <xin.z...@intel.com>
Signed-off-by: Guo Kaijie <kaijie....@intel.com>
Signed-off-by: Xin Zeng <xin.z...@intel.com>
Signed-off-by: Liu Yi L <yi.l....@intel.com>
---
 drivers/iommu/intel/svm.c   | 9 +++++----
 include/linux/intel-iommu.h | 2 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
index 4fa248b98031..69566695d032 100644
--- a/drivers/iommu/intel/svm.c
+++ b/drivers/iommu/intel/svm.c
@@ -142,7 +142,7 @@ static void intel_flush_svm_range_dev (struct intel_svm 
*svm, struct intel_svm_d
        }
        desc.qw2 = 0;
        desc.qw3 = 0;
-       qi_submit_sync(svm->iommu, &desc, 1, 0);
+       qi_submit_sync(sdev->iommu, &desc, 1, 0);
 
        if (sdev->dev_iotlb) {
                desc.qw0 = QI_DEV_EIOTLB_PASID(svm->pasid) |
@@ -166,7 +166,7 @@ static void intel_flush_svm_range_dev (struct intel_svm 
*svm, struct intel_svm_d
                }
                desc.qw2 = 0;
                desc.qw3 = 0;
-               qi_submit_sync(svm->iommu, &desc, 1, 0);
+               qi_submit_sync(sdev->iommu, &desc, 1, 0);
        }
 }
 
@@ -211,7 +211,7 @@ static void intel_mm_release(struct mmu_notifier *mn, 
struct mm_struct *mm)
         */
        rcu_read_lock();
        list_for_each_entry_rcu(sdev, &svm->devs, list)
-               intel_pasid_tear_down_entry(svm->iommu, sdev->dev,
+               intel_pasid_tear_down_entry(sdev->iommu, sdev->dev,
                                            svm->pasid, true);
        rcu_read_unlock();
 
@@ -363,6 +363,7 @@ int intel_svm_bind_gpasid(struct iommu_domain *domain, 
struct device *dev,
        }
        sdev->dev = dev;
        sdev->sid = PCI_DEVID(info->bus, info->devfn);
+       sdev->iommu = iommu;
 
        /* Only count users if device has aux domains */
        if (iommu_dev_feature_enabled(dev, IOMMU_DEV_FEAT_AUX))
@@ -546,6 +547,7 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags,
                goto out;
        }
        sdev->dev = dev;
+       sdev->iommu = iommu;
 
        ret = intel_iommu_enable_pasid(iommu, dev);
        if (ret) {
@@ -575,7 +577,6 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags,
                        kfree(sdev);
                        goto out;
                }
-               svm->iommu = iommu;
 
                if (pasid_max > intel_pasid_max_id)
                        pasid_max = intel_pasid_max_id;
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index d956987ed032..94522685a0d9 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -758,6 +758,7 @@ struct intel_svm_dev {
        struct list_head list;
        struct rcu_head rcu;
        struct device *dev;
+       struct intel_iommu *iommu;
        struct svm_dev_ops *ops;
        struct iommu_sva sva;
        u32 pasid;
@@ -771,7 +772,6 @@ struct intel_svm {
        struct mmu_notifier notifier;
        struct mm_struct *mm;
 
-       struct intel_iommu *iommu;
        unsigned int flags;
        u32 pasid;
        int gpasid; /* In case that guest PASID is different from host PASID */
-- 
2.25.1

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