On Tue, Jan 12, 2021, Sean Christopherson wrote: > On Tue, Jan 12, 2021, Wei Huang wrote: > > From: Bandan Das <[email protected]> > > > > While running VM related instructions (VMRUN/VMSAVE/VMLOAD), some AMD > > CPUs check EAX against reserved memory regions (e.g. SMM memory on host) > > before checking VMCB's instruction intercept. > > It would be very helpful to list exactly which CPUs are/aren't affected, even > if > that just means stating something like "all CPUs before XYZ". Given patch > 2/2, > I assume it's all CPUs without the new CPUID flag?
Ah, despite calling this an 'errata', the bad behavior is explicitly documented in the APM, i.e. it's an architecture bug, not a silicon bug. Can you reword the changelog to make it clear that the premature #GP is the correct architectural behavior for CPUs without the new CPUID flag?
