On 19/01/21 11:33 am, Bean Huo wrote: > On Tue, 2021-01-19 at 09:01 +0200, Adrian Hunter wrote: >> On 18/01/21 10:10 pm, Bean Huo wrote: >>> From: Bean Huo <bean...@micron.com> >>> >>> Currently UFS WriteBooster driver uses clock scaling up/down to set >>> WB on/off, for the platform which doesn't support >>> UFSHCD_CAP_CLK_SCALING, >>> WB will be always on. Provide a sysfs attribute to enable/disable >>> WB >>> during runtime. Write 1/0 to "wb_on" sysfs node to enable/disable >>> UFS WB. >> >> Is it so, that after a full reset, WB is always enabled again? Is >> that >> intended? > > Hello Adrian > Good questions. yes, after a full reset, the UFS device side by default > is wb disabled, then WB will be always enabled agaion in > ufshcd_wb_config(hba). but, for the platform which > supports UFSHCD_CAP_CLK_SCALING, wb will be disabled again while clk > scaling down and enabled while clk scaling up. > > Regarding the last question, I think OEM wants to do that. maybe they > suppose there will be a lot of writing after reset?? From the UFS > device's point of view, the control of WB is up to the user.
If it is by design enabled after reset, then perhaps it should be mentioned in the sysfs documentation.
