st 2. 12. 2020 v 15:14 odesÃlatel Michal Simek <[email protected]> napsal: > > The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version > v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC > commit > "81e0919a3e21 checks: Add interrupt provider test" > where reasons for this checking are mentioned as > "A missing #address-cells property is less critical, but creates > ambiguities when used in interrupt-map properties, so warn about this as > well now." > > That's why add address-cells property to gic and gpio nodes to get rid of > this warning. > > CC: Andre Przywara <[email protected]> > Signed-off-by: Michal Simek <[email protected]> > --- > > I was grepping DTSes in the kernel and most of them list it as 0. > In gicv3 case where its node is added it needs to be filled property that's > why also non 0 values are there. > Definitely please let me know if 0 is not the right value here. > > Based on > https://lore.kernel.org/r/[email protected]/ > > --- > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index 14a2e69cf98b..5b2051ac6965 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -368,6 +368,7 @@ fpd_dma_chan8: dma@fd570000 { > > gic: interrupt-controller@f9010000 { > compatible = "arm,gic-400"; > + #address-cells = <0>; > #interrupt-cells = <3>; > reg = <0x0 0xf9010000 0x0 0x10000>, > <0x0 0xf9020000 0x0 0x20000>, > @@ -574,6 +575,7 @@ gem3: ethernet@ff0e0000 { > gpio: gpio@ff0a0000 { > compatible = "xlnx,zynqmp-gpio-1.0"; > status = "disabled"; > + #address-cells = <0>; > #gpio-cells = <0x2>; > gpio-controller; > interrupt-parent = <&gic>; > -- > 2.29.2 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
