The version register is the only one in the legacy I/O space to be
accessed, so it is not necessary to define the legacy base & version
register offset. A direct definition of the legacy version register
address would be fine.
Signed-off-by: Xu Yilun <yilun...@intel.com>
---
drivers/mfd/intel-m10-bmc.c | 12 +++++-------
include/linux/mfd/intel-m10-bmc.h | 2 +-
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index b84579b..aad86f0 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -74,16 +74,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
/*
* This check is to filter out the very old legacy BMC versions,
- * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
- * registers. In the old BMC chips, the BMC version info is stored
- * in this old version register (M10BMC_LEGACY_SYS_BASE +
- * M10BMC_BUILD_VER), so its read out value would have not been
- * LEGACY_INVALID (0xffffffff). But in new BMC chips that the
+ * 0x300400 is the offset to this old block of mmio registers. In the
+ * old BMC chips, the BMC version info is stored in this old version
+ * register (0x300400 + 0x68), so its read out value would have not
+ * been LEGACY_INVALID (0xffffffff). But in new BMC chips that the
* driver supports, the value of this register should be
* LEGACY_INVALID.
*/
- ret = m10bmc_raw_read(ddata,
- M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
+ ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
if (ret)
return -ENODEV;
diff --git a/include/linux/mfd/intel-m10-bmc.h
b/include/linux/mfd/intel-m10-bmc.h
index 06da62c..99f44b1 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -9,7 +9,7 @@
#include <linux/regmap.h>
-#define M10BMC_LEGACY_SYS_BASE 0x300400
+#define M10BMC_LEGACY_BUILD_VER 0x300468
#define M10BMC_SYS_BASE 0x300800
#define M10BMC_MEM_END 0x1fffffff
--
2.7.4
